China’s CXMT makes ‘key progress’ on new chip structure: SCMP

China’s ChangXin Memory Technologies (CXMT) said it has made “key progress” in developing a new memory cell structure designed to increase DRAM storage density and improve efficiency, a technology also being pursued by Samsung Electronics (SSNLF) and SK Hynix (HXSCL), the South China Morning Post reported.

CXMT president Cao Kanyu said at an industry event in Shanghai over the weekend that the company plans to introduce a new server-memory product based on the technology by the end of 2026, according to a company statement.

The “4F square” design allows more memory cells to fit on a chip, with each cell occupying an area of four square F, where F represents the minimum line width of a semiconductor. Mainstream commercial DRAM currently uses a 6F square-cell structure.

CXMT said its design relies on a proprietary Vertical Surrounding Gate transistor, which uses a vertical gate architecture to reduce current leakage, shrink cell size, and increase storage density.

The transition from the 6F square to the 4F square design represents a shift from horizontal to vertical transistor channels. Because existing manufacturing processes could not be directly adapted to the new structure, CXMT said it had to redesign key processes to optimize the balance between performance and power consumption.

Rival memory makers are also pursuing the technology. SK Hynix (SKHY) unveiled its 4F square roadmap in 2025, while Samsung reportedly plans to begin mass production of sub-10-nanometer DRAM using the design by 2028, according to South Korean outlet The Elec.

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